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 SO 8
PHP225
Dual P-channel intermediate level FET
Rev. 03 -- 4 January 2011 Product data sheet
1. Product profile
1.1 General description
Dual intermediate level P-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using vertical D-MOS technology. This product is designed and qualified for use in computing, communications, consumer and industrial applications only.
1.2 Features and benefits
Low conduction losses due to low on-state resistance Suitable for high frequency applications due to fast switching characteristics
1.3 Applications
Motor and actuator drivers Power management Synchronized rectification
1.4 Quick reference data
Table 1. Symbol VDS ID Ptot RDSon Quick reference data Parameter drain-source voltage drain current total power dissipation drain-source on-state resistance gate-drain charge Conditions Tj 25 C; Tj 150 C Tsp 80 C Tsp = 80 C VGS = -10 V; ID = -1 A; Tj = 25 C VGS = -10 V; ID = -2.3 A; VDS = -15 V; Tj = 25 C
[1]
Min -
Typ -
Max Unit -30 -2.3 2 V A W
Static characteristics 0.22 0.25
Dynamic characteristics QGD 3 nC
[1]
Maximum permissible dissipation per MOS transistor. Both devices may be loaded up to 2 W at the same time.
NXP Semiconductors
PHP225
Dual P-channel intermediate level FET
2. Pinning information
Table 2. Pin 1 2 3 4 5 6 7 8 Pinning information Symbol Description S1 G1 S2 G2 D2 D2 D1 D1 source1 gate1 source2 gate2 drain2 drain2 drain1 drain1
1 4 S1 G1 S2 G2 8 5 D1 D1 D2 D2
Simplified outline
Graphic symbol
SOT96-1 (SO8)
sym115
3. Ordering information
Table 3. Ordering information Package Name PHP225 SO8 Description plastic small outline package; 8 leads; body width 3.9 mm Version SOT96-1 Type number
PHP225
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 03 -- 4 January 2011
2 of 11
NXP Semiconductors
PHP225
Dual P-channel intermediate level FET
4. Limiting values
Table 4. Symbol VDS VGS VGSO ID IDM Ptot Limiting values Parameter drain-source voltage gate-source voltage gate-source voltage drain current peak drain current total power dissipation open drain Tsp 80 C Tsp = 25 C; pulsed Tamb = 25 C Tsp = 80 C Tamb = 25 C Tstg Tj IS ISM
[1] [2] [3] [4] [5]
[1] [2] [3] [4] [5]
In accordance with the Absolute Maximum Rating System (IEC 60134).
Conditions Tj 25 C; Tj 150 C Min -20 -65 Tsp 80 C Tsp = 25 C; pulsed
[1]
Max -30 20 -2.3 -10 1 2 1.3 2 150 150 -1.25 -5
Unit V V V A A W W W W C C A A
storage temperature junction temperature source current peak source current
Source-drain diode -
Pulse width and duty cycle limited by maximum junction temperature. Maximum permissible dissipation per MOS transistor. Device mounted on printed-circuit board with a thermal resistance from ambient to tie-point of 90 K/W. Maximum permissible dissipation per MOS transistor. Both devices may be loaded up to 2 W at the same time. Maximum permissible dissipation if only one MOS transistor dissipates. Device mounted on printed-circuit board with a thermal resistance from ambient to tie-point of 90 K/W. Maximum permissible dissipation per MOS transistor. Device mounted on printed-circuit board with a thermal resistance from ambient to tie-point of 27.5 K/W.
2.5 Ptot (W) 2.0
mlb836
-102 ID (A) -10
(1)
mbe155
tp = 10 s
1.5 -1 1.0
P = tp T
1 ms
-10-1 0.5
tp
DC
0.1 s
t T
0 0 50 100 150 Ts (C) 200
-10-2 -1 -10
-1
-10
VDS (V)
-102
Fig 1.
Power derating curve
Fig 2.
SOAR; P-channel
PHP225
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 03 -- 4 January 2011
3 of 11
NXP Semiconductors
PHP225
Dual P-channel intermediate level FET
5. Thermal characteristics
Table 5. Symbol Rth(j-sp) Thermal characteristics Parameter thermal resistance from junction to solder point Conditions Min Typ Max 35 Unit K/W
6. Characteristics
Table 6. Symbol V(BR)DSS VGS(th) IDSS IGSS RDSon IDSon Characteristics Parameter drain-source breakdown voltage gate-source threshold voltage drain leakage current gate leakage current drain-source on-state resistance on-state drain current Conditions ID = -10 A; VGS = 0 V; Tj = 25 C ID = -1 mA; VDS = VGS; Tj = 25 C VDS = -24 V; VGS = 0 V; Tj = 25 C VGS = 20 V; VDS = 0 V; Tj = 25 C VGS = -20 V; VDS = 0 V; Tj = 25 C VGS = -10 V; ID = -1 A; Tj = 25 C VGS = -4.5 V; ID = -0.5 A; Tj = 25 C VDS = -1 V; VGS = -10 V VDS = -5 V; VGS = -4.5 V Dynamic characteristics QG(tot) QGS QGD Ciss Coss Crss gfs toff ton VSD trr total gate charge gate-source charge gate-drain charge input capacitance output capacitance reverse transfer capacitance transfer conductance turn-off time turn-on time source-drain voltage reverse recovery time VDS = -20 V; ID = -1 A; Tj = 25 C VDS = -20 V; VGS = -10 V; RG(ext) = 4.7 ; RL = 20 ; Tj = 25 C; ID = -1 A VDS = -20 V; VGS = 0 V; f = 1 MHz; Tj = 25 C ID = -2.3 A; VDS = -15 V; VGS = -10 V; Tj = 25 C 1 10 1 3 250 140 50 2 50 20 150 25 140 80 -1.6 200 nC nC nC pF pF pF S ns ns V ns Min -30 -1 -2.3 -1 Typ 0.22 0.33 Max -2.8 -100 100 100 0.25 0.4 Unit V V nA nA nA A A
Static characteristics
Source-drain diode IS = -1.25 A; VGS = 0 V; Tj = 25 C IS = -1.25 A; dIS/dt = 100 A/s; VGS = 0 V; VDS = 25 V; Tj = 25 C
PHP225
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 03 -- 4 January 2011
4 of 11
NXP Semiconductors
PHP225
Dual P-channel intermediate level FET
600 C (pF) 400
mbe144
-10 ID (A) -8
mbe154
VGS = -10 V
-7.5 V
-6 V
-6 Ciss -4 200 Coss Crss 0 0 0 -2 -4 -6 -8 -2
-5 V -4.5 V -4 V -3.5 V -3 V
-10
-20
VDS (V)
-30
0
-2.5 V -10 -12 VDS (V)
Fig 3.
Capacitance as a function of drain-source voltage; P-channel; typical values
Fig 4.
Output characteristics: drain current as a function of drain-source voltage; P-channel; typical values
mbe145
-10 ID (A) -8
mbe157
-10 VGS (V) -8
-6
-6
-4
-4
-2
-2
0 0
-2
-4
-6
VGS (V)
-8
0 0
-2
-4
-6
-8
-10 Qg (nC)
Fig 5.
Transfer characteristics: drain current as a function of gate-source voltage; P-channel; typical values
Fig 6.
Gate-source voltage as a function of gate charge; P-channel; typical values
PHP225
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 03 -- 4 January 2011
5 of 11
NXP Semiconductors
PHP225
Dual P-channel intermediate level FET
104
mda165
1.2 k
mbe138
RDSon (m)
(1) (2)(3) (4) (5)
1.1
1.0
103
0.9
0.8
0.7
102
0
-2
-4
-6
-10 -8 VGS (V)
0.6
-50
0
50
100
Tj (C)
150
Fig 7.
Drain-source on-state resistance as a function of drain current; P-channel; typical values
1.8
mbe146
Fig 8.
Temperature coefficient of gate-source threshold voltage
-6 IS (A) -4
mbe156
k 1.6
(1) (2)
1.4
1.2
(1) (2) (3)
1.0
-2
0.8
0.6
-50
0 0 50 100 Tj (C) 150 0
-0.5
-1
-1.5
VSD (V)
-2
Fig 9.
Temperature coefficient of drain-source on-state resistance; P-channel
Fig 10. Source current as a function of source-drain voltage
PHP225
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 03 -- 4 January 2011
6 of 11
NXP Semiconductors
PHP225
Dual P-channel intermediate level FET
7. Package outline
SO8: plastic small outline package; 8 leads; body width 3.9 mm SOT96-1
D
E
A X
c y HE vMA
Z
8 5
Q A2 A1 pin 1 index Lp
1 4
(A 3)
A
L wM detail X
e
bp
0
2.5 scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 1.75 0.069 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 5.0 4.8 0.20 0.19 E (2) 4.0 3.8 0.16 0.15 e 1.27 0.05 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 Q 0.7 0.6 v 0.25 0.01 w 0.25 0.01 y 0.1 0.004 Z (1) 0.7 0.3 0.028 0.012
o
0.010 0.057 0.004 0.049
0.019 0.0100 0.014 0.0075
0.244 0.039 0.028 0.041 0.228 0.016 0.024
8 o 0
Notes 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. OUTLINE VERSION SOT96-1 REFERENCES IEC 076E03 JEDEC MS-012 JEITA EUROPEAN PROJECTION
ISSUE DATE 99-12-27 03-02-18
Fig 11. Package outline SOT96-1 (SO8)
PHP225 All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 03 -- 4 January 2011
7 of 11
NXP Semiconductors
PHP225
Dual P-channel intermediate level FET
8. Revision history
Table 7. Revision history Release date 20110104 Data sheet status Product data sheet Change notice Supersedes PHP225 v.2 Document ID PHP225 v.3 Modifications:
* *
The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. Product specification PHP225 v.1
PHP225 v.2
19970620
PHP225
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 03 -- 4 January 2011
8 of 11
NXP Semiconductors
PHP225
Dual P-channel intermediate level FET
9. Legal information
9.1 Data sheet status
Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
[1] [2] [3]
Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
9.2
Definitions
Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification -- The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.
Suitability for use -- NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Quick reference data -- The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer's sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer's applications and products planned, as well as for the planned application and use of customer's third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer's applications or products, or the application or use by customer's third party customer(s). Customer is responsible for doing all necessary testing for the customer's applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer's third party customer(s). NXP does not accept any liability in this respect. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective
9.3
Disclaimers
Limited warranty and liability -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors' aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof.
PHP225
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 03 -- 4 January 2011
9 of 11
NXP Semiconductors
PHP225
Dual P-channel intermediate level FET
product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors' specifications such use shall be solely at customer's own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors' standard warranty and NXP Semiconductors' product specifications.
agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer's general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control -- This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. Non-automotive qualified products -- Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors' warranty of the
9.4
Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV, FabKey, GreenChip, HiPerSmart, HITAG, IC-bus logo, ICODE, I-CODE, ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse, QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET, TrenchMOS, TriMedia and UCODE -- are trademarks of NXP B.V. HD Radio and HD Radio logo -- are trademarks of iBiquity Digital Corporation.
10. Contact information
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com
PHP225
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 03 -- 4 January 2011
10 of 11
NXP Semiconductors
PHP225
Dual P-channel intermediate level FET
11. Contents
1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 9.1 9.2 9.3 9.4 10 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General description . . . . . . . . . . . . . . . . . . . . . .1 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2 Ordering information . . . . . . . . . . . . . . . . . . . . . .2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3 Thermal characteristics . . . . . . . . . . . . . . . . . . .4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .4 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . .7 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . .8 Legal information. . . . . . . . . . . . . . . . . . . . . . . . .9 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . .9 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .10 Contact information. . . . . . . . . . . . . . . . . . . . . .10
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'.
(c) NXP B.V. 2011.
All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 4 January 2011 Document identifier: PHP225


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